// -------------------------------------------------------------------- // // Major Functions: 3 Line Buffer, for Image Kernels // // -------------------------------------------------------------------- // // Revision History : // -------------------------------------------------------------------- // Ver :| Author :| Mod. Date :| Changes Made: // V1.0 :| Holguer A Becerra :| 17/15/02 :| Initial Revision // -------------------------------------------------------------------- module linebuffer_3Lines(data,EN, clock, dataout, dataout_x0y0, dataout_x1y0, dataout_x2y0, dataout_x0y1, dataout_x1y1, dataout_x2y1, dataout_x0y2, dataout_x1y2, dataout_x2y2); parameter NUMBER_OF_LINES=3; parameter WIDTH=800; parameter NUMBER_OF=NUMBER_OF_LINES*WIDTH; parameter BUS_SIZE=30; input clock; input EN; input [BUS_SIZE-1:0]data; output [BUS_SIZE-1:0]dataout; output [BUS_SIZE-1:0]dataout_x0y0; output [BUS_SIZE-1:0]dataout_x1y0; output [BUS_SIZE-1:0]dataout_x2y0; output [BUS_SIZE-1:0]dataout_x0y1; output [BUS_SIZE-1:0]dataout_x1y1; output [BUS_SIZE-1:0]dataout_x2y1; output [BUS_SIZE-1:0]dataout_x0y2; output [BUS_SIZE-1:0]dataout_x1y2; output [BUS_SIZE-1:0]dataout_x2y2; reg [BUS_SIZE-1:0]fp_delay[0:NUMBER_OF-1]; assign dataout[BUS_SIZE-1:0]=fp_delay[NUMBER_OF-1][BUS_SIZE-1:0]; always@(posedge clock) begin if(EN)fp_delay[0][BUS_SIZE-1:0]<=data[BUS_SIZE-1:0]; else fp_delay[0][BUS_SIZE-1:0]<=fp_delay[0][BUS_SIZE-1:0]; end genvar index; generate for (index=NUMBER_OF-1; index >= 1; index=index-1) begin: delay_generate always@(posedge clock) begin if(EN)fp_delay[index][BUS_SIZE-1:0]<=fp_delay[index-1][BUS_SIZE-1:0]; else fp_delay[index][BUS_SIZE-1:0]<=fp_delay[index][BUS_SIZE-1:0]; end end endgenerate // assign dataout_x0y0[BUS_SIZE-1:0]=fp_delay[(NUMBER_OF-1)][BUS_SIZE-1:0]; assign dataout_x1y0[BUS_SIZE-1:0]=fp_delay[(NUMBER_OF-2)][BUS_SIZE-1:0]; assign dataout_x2y0[BUS_SIZE-1:0]=fp_delay[(NUMBER_OF-3)][BUS_SIZE-1:0]; assign dataout_x0y1[BUS_SIZE-1:0]=fp_delay[(NUMBER_OF-WIDTH-1)][BUS_SIZE-1:0]; assign dataout_x1y1[BUS_SIZE-1:0]=fp_delay[(NUMBER_OF-WIDTH-2)][BUS_SIZE-1:0]; assign dataout_x2y1[BUS_SIZE-1:0]=fp_delay[(NUMBER_OF-WIDTH-3)][BUS_SIZE-1:0]; assign dataout_x0y2[BUS_SIZE-1:0]=fp_delay[(NUMBER_OF-(2*WIDTH)-1)][BUS_SIZE-1:0]; assign dataout_x1y2[BUS_SIZE-1:0]=fp_delay[(NUMBER_OF-(2*WIDTH)-2)][BUS_SIZE-1:0]; assign dataout_x2y2[BUS_SIZE-1:0]=fp_delay[(NUMBER_OF-(2*WIDTH)-3)][BUS_SIZE-1:0]; endmodule